We’ve known for a long time that Microsoft’s HoloLens relied on a custom “HPU,” or Holographic Processing Unit, to provide the headset’s mixed-reality mode and augmented reality capabilities. At Hot Chips this week, the company actually released some details on how the chip works and what it’s capable of.
According to Microsoft, the HPU can handle a trillion pixel operations per second. While a variety of designs were floated, including a partnership with Movidius, Microsoft ultimately went with a custom design that packs 24 Tensilica DSP cores and 8MB of cache into a single package, alongside 1GB of DDR3. The cores were customized with additional instructions (EETimes reports 300 new instructions, while The Register claims 10). “We used programmable elements wherever possible and fixed function hardware where we needed it to meet our performance goals.” Nick Baker, a technologist at Microsoft, told Hot Chips. “We took co-design to an extreme with this project.”
Image by EETimes
The chip is designed to process feedback from the HoloLens’ multiple cameras and process it in real time, and shares processing duties with a 14nm Intel Cherry Trail Atom SoC. With Intel having discontinued its Atom tablet and smartphone processors it’s not clear what’s next for HoloLens, and Microsoft hasn’t commented on whether it will develop a second-generation HPU or bring the hardware to market at a lower price point more suitable for the consumer and corporate market. Power consumption for the HPU is also reported differently, with EETimes claiming the chip operates “in a power budget lower than the 4W Intel Atom-based Cherry Trail SoC that acts as its host processor,” while The Register states “The HPU draws less than 10W and includes PCIe and standard serial interfaces.”
At present, the HPU operates at less than 50% of its maximum theoretical capacity. While this undoubtedly keeps power consumption down, it also gives Microsoft a way to extend its design and make more use of it in the future without building a brand-new chip. The current HPU is built on 28nm technology at TSMC, which means a die-shrink to 14nm could also improve power consumption and battery life (or allow the chip to leverage more of its processing capabilities in a future product).
Microsoft’s slides imply that the data sent to the Cherry Trail SoC is extensively processed to minimize data transfer requirements and power consumption. The company evaluated a number of potential solutions before settling on the DSPs, including sharing a workload across both CPU and GPU and using an array of traditional CPU cores. The available slides suggest that power consumption remains a formidable barrier to making AR work in wearable headsets — future designs will likely focus on minimizing power consumption for both AR and VR. On the other hand, gamers have clamored for higher-resolution displays and larger viewing frustums — and these are the kind of features that tend to increase weight and power draw, not reduce it.
Based on what Microsoft has revealed about HoloLens’ HPU, it’s clear that the existing solution has some legs — but without knowing more about Redmond’s long-term plans, we can’t say if we’ll ever see the hardware in consumer price points. Right now, HoloLens is a $3,000 solution and marketed to developers only.